Test Vector

Topics related to the Dataman 48, 48LV, 48XP and 48UXP
Guest
Posts: 723
Joined: 09 Nov 2011 17:16

Test Vector

Postby Guest » 11 Nov 2011 11:23

I have a 48XP (recent upgrade from LV).

I just tried programming and testing a GAL16V8D and it seems as though the test vectors don't work. I have manually created a couple vectors to 'verify' against the device and they pass. Now the weird part is when I modify one of the vectors to pretent some active low output pin is asserted (when it is not) it STILL PASSES! Any thoughts??

TonyK

Dataman (Neil Parker)
Posts: 931
Joined: 10 Nov 2011 09:51

Re: Test Vector

Postby Dataman (Neil Parker) » 11 Nov 2011 11:24

Tony,

Test vectors are normally generated by the GAL compiler tool to test the function of the GAL after programming and after the chip has been protected. If the chip fails in the function test it means the JEDEC may not work as you would expect. Which means the design of the PLD may not fit the target. It has nothing to do with the programmer. the programmer just out puts the vector in the map and accepts the input and tells you if there is an error with the output compared to the expected output.

Neil


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